Heat load per footprint [W/ft2]
Chip maximum power density
10,000 Communication equipment 1,000
Servers and disk
storage systems 100
Tape storage systems
1992 1996 2000 2004 200 8 1. 510.7 0.50.350.25 0.18 0.13 0.1 0.07
Year F eat ure size[ [ m ]
(Left) From 2000 to 2010, the annual rate of increase for heat density in data centers
ranges from 7 to 28 percent for communications equipment. The vertical axis is plot-ted on a logarithmic scale, which highlights the alarming increase in power density.
(Right) Similarly, there is a dramatic increase in the power density of VLSI chips. Consequently, photonic devices must be able to operate on the hot VLSI substrate and
their own power dissipation must be minimal.
Source: (Left) Kenneth G. Brill, Uptime Institute Inc. white paper, 2005. (Right) Courtesy of Fred Pollack.
e need for energy-e cient photonics is exacerbated by the excessive energy
dissipation in advanced electronics—the
world to which photonics must adapt.
As described by Moore’s law, transistor
count has been increasing at an astonishing pace in today’s microprocessors. For
instance, the Intel Itanium II chip boasts
nearly 2 billion transistors. An unintended consequence is that the power density
has already exceeded 100 W/cm , which
challenges even the most advanced chip-cooling technologies. is has important
implications for photonic devices, for
they must be able to operate reliably
at substrate temperatures as high as
90° C. e problem of heat dissipation
is so severe that it threatens to halt the
continued advance of the industry. It has
prompted the recent momentous shift of
the microprocessor industry away from
increasing clock speed and in favor of
makes sense considering the material
and process compatibility between
silicon photonics and the dominant
microelectronics technology, known
as the complementary metal-oxide-semiconductor (CMOS) process.
To uncover the challenges that lie
ahead, we must evaluate the full implication of “compatibility.” Full compatibility consists of material, process,
economic and heat considerations. Material and process compatibilities are self-explanatory and much easier to satisfy
than economic and heat compatibilities.
Economic compatibility dictates the
highly e cient use of wafer real estate
Silicon: an attractive
The communications bottleneck
imposed by metallic interconnects
platform for photonics
Silicon is becoming the material of
choice for manufacturing photonic
components that overcome the communications bottleneck in computing and
telecommunications equipment. e
prevailing vision for silicon photonics
has been to integrate optics and electronics on the same chip. is approach
500 350 250 180 130 90
CMOS gate length [nm]
and products that have a high-volume
market. Heat compatibility requires that
photonic devices must be able to operate
on the hot very-large-scale integrated
(VLSI) chip and that their own power
dissipation must be minimal.
Among photonic components, lasers
and laser-driver circuits are the most
power-hungry devices. To date, the lack
of any viable electrically pumped silicon
lasers dictates an architecture where the
light source remains o -chip. is architecture is in fact preferred as it removes a
main source of heat dissipation. Furthermore, the performance degradation of
injection lasers at high temperatures may
be an obstacle to their integration onto
the “hot” VLSI substrate, even when
such silicon lasers are demonstrated.
Modulators, amplifiers, photodetectors, and perhaps wavelength converters
are destined to be integrated on-chip.
Among these devices, the modulator and
the amplifier have the highest power dissipation. Similar to bipolar transistors,
carrier-injection-type optical modulators
su er from static power dissipation. On
the other hand, depletion-mode free-carrier modulators, as well as devices
based on the quantum-confined Stark
e ect in Si/Ge quantum wells, will have
low static-power dissipation.
In addition, conventional wisdom
holds that optical interconnects are
much better suited than copper interconnects to handling high data rates
(>10Gb/s). Hence, silicon photonics may
be a solution for solving the communications bottleneck problem in CMOS
VLSI electronics. However, with the
use of equalization and other signal-processing techniques, copper interconnects can address higher and higher data
rates, albeit at the cost of higher power
dissipation. erefore, for silicon optical
interconnects to replace their copper
counterparts, they must be more green.
Optical interconnects are thought to be
one way to solve the interconnect bottleneck. However, for optical interconnects
to replace their copper counterparts,
they must be energy-ef cient.
Energy efficiency of
e amount of information that can be
sent through an optical channel increases with optical power. Meanwhile, to